SiC monocrystal wafer
Silicon carbide (SiC) single crystal wafers are known for their high thermal conductivity, wide bandgap, and excellent resistance to chemical and thermal stress. These properties make them ideal for high-power, high-frequency, and high-temperature applications. SiC wafers are commonly used in power electronics, LEDs, radio frequency devices, and sensors for industries such as automotive, aerospace, and renewable energy.
For inquiry, please give us the following information:
- Size with tolerance (Diameter /Thickness)
- Grade
- Polytype
- Resistivity (N or Semi-insulating)
- Primary flat
- Electrical resistivity
- Polishing
- Quantity
General properties
| Polytype |
4H
|
6H
|
|
Lattice Parameters
|
a=3.076Å c=10.053Å
|
a=3.073Å c=15.117Å
|
|
Stacking Sequence
|
ABCB
|
ABCACB
|
|
Mohs Hardness
|
≈9.2
|
≈9.2
|
|
Density
|
3.21 g/cm3
|
3.21 g/cm3
|
|
Therm. Expansion Coefficient
|
4-5×10-6/k
|
4-5×10-6/k
|
|
Refraction Index @ 750nm
|
no=2.61 ne=2.66
|
no=2.60 ne=2.65
|
|
Dielectric Constant
|
c~9.66
|
c~9.66
|
|
Thermal Conductivity (N-Type, 0.02 ohm.cm)
|
a~4.2 W/cm⋅K@298K c~3.7 W/cm⋅K@298K
|
|
|
Thermal Conductivity (Semi-insulating)
|
a~4.9 W/cm⋅K@298K c~3.9 W/cm⋅K@298K
|
a~4.6 W/cm⋅K@298K c~3.2 W/cm⋅K@298K
|
|
Band-gap
|
3.23 eV
|
3.02 eV
|
|
Break-Down Electrical Field
|
3-5 x 106 V/cm
|
3-5 x 106 V/cm
|
|
Saturation Drift Velocity
|
2.0 x 105 m/s
|
2.0 x 105 m/s
|
Specifications
|
Grade
|
Production
|
Research
|
Dummy
|
|
|
Diameter
|
50.8mm±0.38mm
|
|||
|
Thickness
|
330um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-N/6H-N/4H-SI/6H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N/4H-SI
|
|||
|
Micropipe Density
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
|
Resistivity
|
4H-N
|
0.015~0.028Ω⋅cm
|
||
|
6H-N
|
0.02~0.1Ω⋅cm
|
|||
|
4/6H-SI
|
>1E5Ω⋅cm
|
(90%)>1E5Ω⋅cm
|
||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
15.9mm±1.7mm
|
|||
|
Secondary Flat Length
|
8.0mm±1.7mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
1mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤25um
|
|||
|
Roughness
|
Optical polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
None
|
1 allowed, ≤1mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤1%
|
Cumulative area ≤3%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤2%
|
Cumulative area ≤5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
8 scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Production
|
Research
|
Dummy
|
|
|
Diameter
|
76.2mm±0.38mm
|
|||
|
Thickness
|
350um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Micropipe Density
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
|
Resistivity
|
4H-N
|
0.015~0.028Ω⋅cm
|
||
|
4H-SI
|
>1E5Ω⋅cm
|
(90%)>1E5Ω⋅cm
|
||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
22.2mm±3.2mm
|
|||
|
Secondary Flat Length
|
11.2mm±1.5mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
2mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤35um
|
|||
|
Roughness
|
Optical polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
None
|
1 allowed ,≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤1%
|
Cumulative area ≤3%
|
|
|
Polytype areas by high intensity *2 light
|
None
|
Cumulative area ≤2%
|
Cumulative area ≤5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
8 scratches to 2 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Zero MPD
|
Production
|
Research
|
Dummy
|
|
Diameter
|
100.0mm±0.5mm
|
|||
|
Thickness
|
4H-N
|
350um±25um
|
||
|
4H-SI
|
500um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Micropipe Density
|
≤1cm-2
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
Resistivity 4H-N 4H-SI
|
0.015~0.028Ω⋅cm
|
|||
|
≥1E5Ω⋅cm
|
||||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
32.5mm±2.0mm
|
|||
|
Secondary Flat Length
|
18.0mm±2.0mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
3mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤40um
|
|||
|
Roughness
|
Optical Polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
1 allowed, ≤2mm
|
Cumulative length ≤10mm, single length≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤ 1%
|
Cumulative area ≤ 3%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
5scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Zero MPD
|
Production
|
Research
|
Dummy
|
|
Diameter
|
150.0mm±0.25mm
|
|||
|
Thickness
|
4H-N
|
350um±25um
|
||
|
4H-SI
|
500um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
47.5mm±2.5mm
|
|||
|
Edge exclusion
|
3mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤40um/≤60um
|
|||
|
Micropipe Density
|
≤1cm-2
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
Resistivity 4H-N 4H-SI
|
0.015~0.028Ω⋅cm
|
|||
|
≥1E5Ω⋅cm
|
||||
|
Roughness
|
Optical Polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
1 allowed, ≤2mm
|
Cumulative length ≤10mm, single length≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
5scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
Specifications
|
Grade
|
Production
|
Research
|
Dummy
|
|
|
Diameter
|
50.8mm±0.38mm
|
|||
|
Thickness
|
330um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-N/6H-N/4H-SI/6H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N/4H-SI
|
|||
|
Micropipe Density
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
|
Resistivity
|
4H-N
|
0.015~0.028Ω⋅cm
|
||
|
6H-N
|
0.02~0.1Ω⋅cm
|
|||
|
4/6H-SI
|
>1E5Ω⋅cm
|
(90%)>1E5Ω⋅cm
|
||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
15.9mm±1.7mm
|
|||
|
Secondary Flat Length
|
8.0mm±1.7mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
1mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤25um
|
|||
|
Roughness
|
Optical polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
None
|
1 allowed, ≤1mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤1%
|
Cumulative area ≤3%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤2%
|
Cumulative area ≤5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
8 scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Production
|
Research
|
Dummy
|
|
|
Diameter
|
76.2mm±0.38mm
|
|||
|
Thickness
|
350um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Micropipe Density
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
|
Resistivity
|
4H-N
|
0.015~0.028Ω⋅cm
|
||
|
4H-SI
|
>1E5Ω⋅cm
|
(90%)>1E5Ω⋅cm
|
||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
22.2mm±3.2mm
|
|||
|
Secondary Flat Length
|
11.2mm±1.5mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
2mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤35um
|
|||
|
Roughness
|
Optical polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
None
|
1 allowed ,≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤1%
|
Cumulative area ≤3%
|
|
|
Polytype areas by high intensity *2 light
|
None
|
Cumulative area ≤2%
|
Cumulative area ≤5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
8 scratches to 2 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Zero MPD
|
Production
|
Research
|
Dummy
|
|
Diameter
|
100.0mm±0.5mm
|
|||
|
Thickness
|
4H-N
|
350um±25um
|
||
|
4H-SI
|
500um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Micropipe Density
|
≤1cm-2
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
Resistivity 4H-N 4H-SI
|
0.015~0.028Ω⋅cm
|
|||
|
≥1E5Ω⋅cm
|
||||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
32.5mm±2.0mm
|
|||
|
Secondary Flat Length
|
18.0mm±2.0mm
|
|||
|
Secondary Flat Orientation
|
Silicon face up : 90 °CW from Prime flat ±5.0°
|
|||
|
Edge exclusion
|
3mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤25um/≤40um
|
|||
|
Roughness
|
Optical Polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
1 allowed, ≤2mm
|
Cumulative length ≤10mm, single length≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤ 1%
|
Cumulative area ≤ 3%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
5scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
|
Grade
|
Zero MPD
|
Production
|
Research
|
Dummy
|
|
Diameter
|
150.0mm±0.25mm
|
|||
|
Thickness
|
4H-N
|
350um±25um
|
||
|
4H-SI
|
500um±25um
|
|||
|
Wafer Orientation
|
On axis :<0001>±0.5°for 4H-SI
Off axis : 4.0°toward<1120>±0.5°for 4H-N |
|||
|
Primary Flat
|
{10-10}±5.0°
|
|||
|
Primary Flat Length
|
47.5mm±2.5mm
|
|||
|
Edge exclusion
|
3mm
|
|||
|
TTV/Bow/Warp
|
≤15um/≤40um/≤60um
|
|||
|
Micropipe Density
|
≤1cm-2
|
≤5cm-2
|
≤15cm-2
|
≤50cm-2
|
|
Resistivity 4H-N 4H-SI
|
0.015~0.028Ω⋅cm
|
|||
|
≥1E5Ω⋅cm
|
||||
|
Roughness
|
Optical Polish Ra ≤1nm on the C-face
CMP Ra≤0.5nm on the Si-face
|
|||
|
Cracks by high intensity light *1
|
None
|
1 allowed, ≤2mm
|
Cumulative length ≤10mm, single length≤2mm
|
|
|
Hex plates by high intensity light *2
|
Cumulative area ≤1%
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Polytype areas by high intensity light *2
|
None
|
Cumulative area ≤ 2%
|
Cumulative area ≤ 5%
|
|
|
Scratches by high intensity light *2*3
|
3 scratches to 1 x wafer diameter cumulative length
|
5 scratches to 1 x wafer diameter cumulative length
|
5scratches to 1 x wafer diameter cumulative length
|
|
|
Edge chip
|
None
|
3 allowed, ≤0.5mm each
|
5 allowed, ≤1mm each
|
|
|
Contamination by high intensity light
|
None
|
|||
*1: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*2: Defects shall be existed in the edge area ,only defect beyond of the prescribed scope could be considered as reject cause.
*3: Scratches should be checked on Si face only.
